Optimizing Power-Area for Constant Input-referred Noise Level in MOSFETs

Area and current consumption are crucial for design of low-noise low-bandwidth preamplifiers for biosignal amplification. In this paper we present an analytical method for optimizing power-area for a constant root mean square (RMS) input-referred noise level of MOSFETs. Power-area optimization is performed for single PMOS transistor over 1mHz to 10kHz for 1 mu Vrms input-referred RMS noise level in a 0.18 mu m CMOS technology. The results are validated by using HSPICE circuit simulation and numerical simulations. The results indicate that both area and area-current product of transistor can be optimized of a specific input-referred RMS noise level.