High-speed and low-power non-return-to-zero delayed flip-flop circuit using resonant tunneling diode/high electron mobility, transistor integration technology

被引：6

作者：

Kim, Hyungtae ^{[1
]}

Yeon, Seongjin ^{[1
]}

Seo, Kwangseok ^{[1
]}

机构：

[1] Seoul Natl Univ, Sch Elect Engn & Comp Sci, Seoul 151742, South Korea

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS | 2007年 / 46卷 / 4B期

关键词：

delayed flip-flop; RTD; HEMT; InP;

D O I：

10.1143/JJAP.46.2300

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

A high-speed and low-power delayed flip-flop circuit with non-return-to-zero mode output using a new negative differential resistance logic element is proposed and fabricated using resonant tunneling diode (RTD)/high electron mobility transistor (HEMT) integration technology on an InP substrate. The number of devices used in the delayed flip-flop and the power dissipation has been significantly reduced by using the proposed scheme. The operation of the fabricated delayed flip-flop is demonstrated up to 26 Gb/s with a very low power dissipation of about 2.8 mW at a power supply voltage of 0.9 V.

引用

页码：2300 / 2305

页数：6

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