共 24 条
[1]
Multiple SiGe well: a new channel architecture for improving both NMOS and PMOS performances
[J].
2000 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS,
2000,
:130-131
[2]
SiGe channel p-MOSFETs scaling-down
[J].
ESSDERC 2003: PROCEEDINGS OF THE 33RD EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE,
2003,
:267-270
[3]
[Anonymous], 2008, INT EL DEV M SAN FRA
[4]
[Anonymous], 2009, IEDM
[5]
Cros A., 2006, INT ELECT DEVICES M, P663
[6]
Dupré C, 2008, ULIS 2008: PROCEEDINGS OF THE 9TH INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON, P133
[9]
IMPROVED ANALYSIS OF LOW-FREQUENCY NOISE IN FIELD-EFFECT MOS-TRANSISTORS
[J].
PHYSICA STATUS SOLIDI A-APPLIED RESEARCH,
1991, 124 (02)
:571-581