Low On-Resistance and Low Trapping Effects in 1200 V Superlattice GaN-on-Silicon Heterostructures

Herein, the development of gallium nitride on silicon (GaN-on-Si) heterostructures targeting 1200 V power applications is reported. In particular, it is shown that the insertion of superlattices (SLs) into the buffer layers allows pushing the vertical breakdown voltage above 1200 V without generating additional trapping effects as compared with a more standard optimized step-graded AlGaN-based epistructure using a similar total buffer thickness. DC characterizations of fabricated transistors by means of back-gating measurements reflect both the enhancement of the breakdown voltage and the low trapping effects up to 1200 V. These results show that a proper buffer optimization and the insertion of SL pave the way to GaN-on-Si lateral power transistors operating at 1200 V with low on-resistance and low trapping effects.