A coprocessor for the final exponentiation of the ητ pairing in characteristic three

被引:0
|
作者
Beuchat, Jean-Luc [1 ]
Brisebarre, Nicolas [2 ,3 ]
Shirase, Masaaki [4 ]
Takagi, Tsuyoshi [4 ]
Okamoto, Eiji [1 ]
机构
[1] Univ Tsukuba, Lab Cryptog & Informat Secur, 1-1-1 Tennodai, Tsukuba, Ibaraki 3058573, Japan
[2] Univ J Monnet, LaMUSE, F-42023 St Etienne, France
[3] ENS Lyon, CNRS ENS Lyon INRIA UCBL, LIP, F-69364 Lyon, France
[4] Future Univ, Sch Syst Informat Sci, Hakodate, Hokkaido 041-8655, Japan
来源
ARITHMETIC OF FINITE FIELDS, PROCEEDINGS | 2007年 / 4547卷
关键词
eta(T) pairing; characteristic three; final exponentiation; hardware accelerator; FPGA;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Since the introduction of pairings over (hyper)elliptic curves in constructive cryptographic applications, an ever increasing number of protocols based on pairings have appeared in the literature. Software implementations being rather slow, the study of hardware architectures became an active research area. Beuchat et al. proposed for instance a coprocessor which computes the characteristic three eta(T) pairing, from which the Tate pairing can easily be derived, in 33 mu s on a Cyclone II FPGA. However, a final exponentiation is required to ensure a unique output value and the authors proposed to supplement their eta(T) pairing accelerator with a coprocessor for exponentiation. Thus, the challenge consists in designing the smallest possible piece of hardware able to perform this task in less than 33 mu s on a Cyclone II device. In this paper, we propose a novel arithmetic operator implementing addition, cubing, and multiplication over F-397 and show that a coprocessor based on a single such operator meets this timing constraint.
引用
收藏
页码:25 / +
页数:5
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