Enhancing Speculative Execution With Selective Approximate Computing

被引:5
作者
Nongpoh, Bernard [1 ]
Ray, Rajarshi [1 ]
Das, Moumita [2 ]
Banerjee, Ansuman [2 ]
机构
[1] Natl Inst Technol Meghalaya, Bijni Complex, Shillong 793003, Meghalaya, India
[2] Indian Stat Inst Kolkata, Barrackpore Trunk Rd, Kolkata 700108, W Bengal, India
关键词
Approximate computing; speculative execution; hypothesis testing; Bayesian analysis; SENSITIVITY-ANALYSIS; FRAMEWORK;
D O I
10.1145/3307651
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Speculative execution is an optimization technique used in modern processors by which predicted instructions are executed in advance with an objective of overlapping the latencies of slow operations. Branch prediction and load value speculation are examples of speculative execution used in modern pipelined processors to avoid execution stalls. However, speculative executions incur a performance penalty as an execution rollback when there is a misprediction. In this work, we propose to aid speculative execution with approximate computing by relaxing the execution rollback penalty associated with a misprediction. We propose a sensitivity analysis method for data and branches in a program to identify the data load and branch instructions that can be executed without any rollback in the pipeline and yet can ensure a certain user-specified quality of service of the application with a probabilistic reliability. Our analysis is based on statistical methods, particularly hypothesis testing and Bayesian analysis. We perform an architectural simulation of our proposed approximate execution and report the benefits in terms of CPU cycles and energy utilization on selected applications from the AxBench, ACCEPT, and Parsec 3.0 benchmarks suite.
引用
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页数:29
相关论文
共 45 条
[1]  
Aster R. C., 2011, PARAMETER ESTIMATION, V90
[2]   Integrated predicated and speculative execution in the IMPACT EPIC architecture [J].
August, DI ;
Connors, DA ;
Mahlke, SA ;
Sias, JW ;
Crozier, KM ;
Cheng, BC ;
Eaton, PR ;
Olaniran, QB ;
Hwu, WMW .
25TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE, PROCEEDINGS, 1998, :227-237
[3]   The PARSEC Benchmark Suite: Characterization and Architectural Implications [J].
Bienia, Christian ;
Kumar, Sanjeev ;
Singh, Jaswinder Pal ;
Li, Kai .
PACT'08: PROCEEDINGS OF THE SEVENTEENTH INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES, 2008, :72-81
[4]  
Carlson Trevor E., 2014, ACM T ARCHIT CODE OP, V11, P3
[5]  
Chen ICK, 1997, PR IEEE COMP DESIGN, P593, DOI 10.1109/ICCD.1997.628926
[6]  
Düben P, 2015, DES AUT TEST EUROPE, P764
[7]   The YAGS branch prediction scheme [J].
Eden, AN ;
Mudge, T .
31ST ANNUAL ACM/IEEE INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE, PROCEEDINGS, 1998, :69-77
[8]   Neural Acceleration for General-Purpose Approximate Programs [J].
Esmaeilzadeh, Hadi ;
Sampson, Adrian ;
Ceze, Luis ;
Burger, Doug .
2012 IEEE/ACM 45TH INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE (MICRO-45), 2012, :449-460
[9]  
Feller W., 1968, INTRO PROBABILITY TH
[10]  
Gonzalez J., 1997, Conference Proceedings of the 1997 International Conference on Supercompting, P196, DOI 10.1145/263580.263631