Cellular neural network based VLSI architecture for image processing

被引:0
作者
Slot, K
Kowalski, J
Pacholik, J
Debiec, P
机构
来源
1996 FOURTH IEEE INTERNATIONAL WORKSHOP ON CELLULAR NEURAL NETWORKS AND THEIR APPLICATIONS, PROCEEDINGS (CNNA-96) | 1996年
关键词
D O I
10.1109/CNNA.1996.566569
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
The paper presents a way for increasing a size of images which can be processed using Cellular Neural Networks based VLSI circuits. Basic idea is to reduce a number of rows which are being simultaneously processed in a network. To verify the proposed ideal a VLSI integrated circuit which allows for realizing selected gray-level image analyses, has been designed, manufactured and its performance was examined. In addition, a possibility of applying the proposed concept in realizing image processing operations where global signal propagation is crucial such as e.g. halftoning, have been discussed.
引用
收藏
页码:249 / 254
页数:6
相关论文
共 50 条
  • [41] Cellular pulse coupled neural network with adaptive weights for image segmentation and its VLSI implementation
    Schreiter, J
    Ramacher, U
    Heittmann, A
    Matolin, D
    Schüffny, R
    IMAGE PROCESSING: ALGORITHMS AND SYSTEMS III, 2004, 5298 : 290 - 296
  • [42] A novel configurable VLSI architecture design of window-based image processing method
    Zhao, Hui
    Sang, Hongshi
    Shen, Xubang
    MIPPR 2017: PARALLEL PROCESSING OF IMAGES AND OPTIMIZATION TECHNIQUES; AND MEDICAL IMAGING, 2018, 10610
  • [43] Image monitoring and recognition processing based on neural network
    Min L.
    Zhengkun Y.
    1600, National Research Nuclear University (12): : 89 - 99
  • [44] The Review of Image Processing Based on Graph Neural Network
    Nie, Jinji
    Xu, You
    Huang, Yichuan
    Li, Jiehao
    INTELLIGENT ROBOTICS AND APPLICATIONS, ICIRA 2021, PT IV, 2021, 13016 : 534 - 544
  • [45] Temperature Measurement Based on Image Processing & Neural Network
    Mane, Sanket S.
    Patil, Ramesh T.
    2015 INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONICS, SIGNALS, COMMUNICATION AND OPTIMIZATION (EESCO), 2015,
  • [46] A VLSI architecture suitable for mid-level image processing
    Dessbesell, Gustavo F.
    Pacheco, Marcio A.
    Martins, Joao B. dos S.
    Molz, Rolf Fredi
    2008 4TH SOUTHERN CONFERENCE ON PROGRAMMABLE LOGIC, PROCEEDINGS, 2008, : 87 - +
  • [47] Design of multilevel filter VLSI architecture for infrared image processing
    State Key Laboratory for Image Processing and Intelligent Control, Institute for Pattern Recognition and Artificial Intelligence, Huazhong Univ. of Sci. and Technol., Wuhan 430074, China
    Guti Dianzixue Yanjiu Yu Jinzhan, 2006, 3 (354-358):
  • [48] A VLSI Architecture for Wavelet Based Image Compression
    Kidav, Jayaraj U.
    Ajeesh, P. A.
    Vasudev, Drisya
    Deepak, V. S.
    Menon, Aiswarya
    ADVANCES IN COMPUTING AND INFORMATION TECHNOLOGY, VOL 3, 2013, 178 : 603 - +
  • [49] Deep architecture neural network-based real-time image processing for image-guided radiotherapy
    Mori, Shinichiro
    PHYSICA MEDICA-EUROPEAN JOURNAL OF MEDICAL PHYSICS, 2017, 40 : 79 - 87
  • [50] Mixed analog-digital image processing circuit based on hamming artificial neural network architecture
    Badel, S
    Schmid, A
    Leblebici, Y
    2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 5, PROCEEDINGS, 2004, : 780 - 783