Superblock FTL: A Superblock-Based Flash Translation Layer with a Hybrid Address Translation Scheme

被引:62
作者
Jung, Dawoon [1 ]
Kang, Jeong-Uk [2 ]
Jo, Heeseung [1 ]
Kim, Jin-Soo [3 ]
Lee, Joonwon [3 ]
机构
[1] Korea Adv Inst Sci & Technol, Dept Comp Sci, Taejon 305701, South Korea
[2] Samsung Elect Co, Memory Div, Gyeonggi, South Korea
[3] Sungkyunkwan Univ, Sch Informat & Commun Engn, Suwon, Gyeonggi Do, South Korea
关键词
Design; Performance; FTL; NAND flash memory; storage system; hybrid address translation; ARCHITECTURE;
D O I
10.1145/1721695.1721706
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In NAND flash-based storage systems, an intermediate software layer called a Flash Translation Layer (FTL) is usually employed to hide the erase-before-write characteristics of NAND flash memory. We propose a novel superblock-based FTL scheme, which combines a set of adjacent logical blocks into a superblock. In the proposed Superblock FTL, superblocks are mapped at coarse granularity, while pages inside the superblock are mapped freely at fine granularity to any location in several physical blocks. To reduce extra storage and flash memory operations, the fine-grain mapping information is stored in the spare area of NAND flash memory. This hybrid address translation scheme has the flexibility provided by fine-grain address translation, while reducing the memory overhead to the level of coarse-grain address translation. Our experimental results show that the proposed FTL scheme significantly outperforms previous block-mapped FTL schemes with roughly the same memory overhead.
引用
收藏
页数:41
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