This work presents the design of a high power, two stage, wideband, balanced power amplifier (PA) implemented in a 90 nm SiGe BiCMOS technology. Asymmetric coupled-line couplers were employed at the input and output of the circuit for impedance transformation and quadrature signal splitting and combining. The design achieves 17.3 dB small-signal gain with 41.8 GHz 3-dB bandwidth from 28.1 GHz to 69.9 GHz. To obtain high output power, two novel Wilkinson baluns were included, together with the output coupler, to achieve an overall 4-way differential power combining. A 24.4 dBm saturated output power (PsAT) is achieved with a 22.0 GHz 1-dB PsAT bandwidth covering from 45.0 GHz to 67.0 GHz. The circuit shows a peak power added efficiency (PAE) of 14.2% at 60 GHz and the peak PAE is above 11.5% across the 1-dB PsAT bandwidth. The two stages adopt common-emitter power cells with the first stage biased at 2.0 V and second stage at 1.8 V. The chip size is 1.22 mm(2) including bondpads.
