A 0.18-μm CMOS offset-PLL upconversion modulation loop IC for DCS1800 transmitter

被引：15
作者：
Hsu, JM [1 ]
机构：
[1] Ind Technol Res Inst, Syst On Chip Technol Ctr, Hsinchu 310, Taiwan
来源：
IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2003年 / 38卷 / 04期
关键词：
CMOS; DCS; GSM; I/Q modulator; phase-locked loop (PLL); transmitter;
D O I：
10.1109/JSSC.2003.809518
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A DCS1800 offset-phase-locked-loop upconversion modulation loop integrated circuit (IC) fabricated in a 0.18-mum CMOS technology is presented in this paper. This IC operates at 2.8-V supply voltage with a-current consumption of 36 mA. The measured root-mean-square and peak phase errors of the Gaussian minimum shift keying (GMSK) transmission signal are 1.6degrees and 4degrees, respectively. It is shown that such circuits can be implemented in CMOS process with current dissipation and performance comparable to BiCMOS chips. Advantages of upconversion modulation loop and design issues of I/Q modulators are also described.
引用
收藏
页码：603 / 613
页数：11
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