Design, Implementation and Analysis of Efficient Hardware-based Security Primitives

被引：2

作者：

Anandakumar, N. Nalla ^{[1
]}

Sanadhya, Somitra Kumar ^{[2
]}

Hashmi, Mohammad S. ^{[3
]}

机构：

[1] Soc Elect Trans & Secur SETS, Hardware Secur Res Lab, Chennai, Tamil Nadu, India

[2] IIT Ropar, Dept CSE, Rupnagar, India

[3] Nazarbayev Univ, Sch Engn & Digital Sci, Nur Sultan, Kazakhstan

来源：

2020 IFIP/IEEE 28TH INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC) | 2020年

关键词：

PUF; TRNG; authenticated key agreement protocol; FPGA;

D O I：

10.1109/VLSI-SOC46417.2020.9344097

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Hardware-based security primitives play important roles in protecting and securing a system in Internet of Things (IoT) applications. The main primitives are physical unclonable functions (PUF) and true random number generator (TRNG) studied in this paper. Efficient FPGA implementation are proposed in the work along with relevant security analysis using prevalent metrics. Finally, an application of designed TRNG and PUF is proposed for implementing an authenticated key agreement protocol.

引用

页码：198 / 199

页数：2

共 5 条

[1] Anandakumar N. N., 2020, THESIS IIIT DELHI
[2] Anandakumar N. N., 2019, IEEE T CIRCUITS SYST, P1
[3] Efficient and Lightweight FPGA-based Hybrid PUFs with Improved Performance
Anandakumar, N. Nalla
Hashmi, Mohammad S.
Sanadhya, Somitra Kumar
[J]. MICROPROCESSORS AND MICROSYSTEMS, 2020, 77
[4] Reconfigurable Hardware Architecture for Authenticated Key Agreement Protocol Over Binary Edwards Curve
Anandakumar, N. Nalla
Das, M. Prem Laxman
Sanadhya, Somitra K.
Hashmi, Mohammad S.
[J]. ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS, 2018, 11 (02)
[5] Compact Implementations of FPGA-Based PUFs with Enhanced Performance
Anandakumar, N. Nalla
Hashmi, Mohammad S.
Sanadhya, Somitra Kumar
[J]. 2017 30TH INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2017 16TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID 2017), 2017, : 161 - 166

← 1 →