A Zonotoped Macromodeling for Eye-Diagram Verification of High-Speed I/O Links With Jitter and Parameter Variations

被引:3
|
作者
Ni, Leibin [1 ]
Manoj, Sai P. D. [1 ]
Song, Yang [2 ]
Gu, Chenjie [3 ]
Yu, Hao [1 ]
机构
[1] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore 639798, Singapore
[2] Univ Calif San Diego, Sch Elect & Comp Engn, San Diego, CA 92093 USA
[3] Intel Corp, Hillsboro, OR 97124 USA
关键词
Eye-diagram verification; I/O links; simulation; variation; zonotoped macromodel; SRAM DYNAMIC STABILITY; ORDER; OPTIMIZATION; INTERCONNECT; CIRCUITS; MODELS;
D O I
10.1109/TCAD.2015.2481873
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
It is challenging to efficiently evaluate the performance bound of high-precision analog circuits with input and parameter variations at nano-scale. With the use of zonotope to model uncertainty of input data pattern (or jitter) and multiple parameters, a reachability-based verification is developed in this paper to compute the worst-case eye-diagram. The proposed zonotope-based reachability analysis can consider both spatial and temporal variations in one-time simulation. Moreover, a nonlinear zonotoped macromodeling is further developed to reduce the computational complexity. Performance bound for I/O links considering the parameter variations are evaluated. In addition, the eye-diagrams are generated by the proposed zonotoped macromodel for performance evaluation considering both temporal and spatial variations. As shown by experiments, the zonotoped macromodel achieves up to 450x speedup compared to the Monte Carlo simulation of the original model within small error under specified macromodel order for high-speed I/O links eye-diagram verification.
引用
收藏
页码:1040 / 1051
页数:12
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