Ultra-Low Program Current and Multilevel Phase Change Memory for High-Density Storage Achieved by a Low-Current SET Pre-Operation

被引：17

作者：

He, Mingze ^{[1
]}

He, Da ^{[1
]}

Qian, Hang ^{[1
]}

Lin, Qi ^{[1
]}

Wan, Daixing ^{[1
]}

Cheng, Xiaomin ^{[1
]}

Xu, Ming ^{[1
]}

Tong, Hao ^{[1
]}

Miao, Xiangshui ^{[1
]}

机构：

[1] Huazhong Univ Sci & Technol, Sch Opt & Elect Informat, Wuhan Natl Lab Optoelect, Wuhan 430074, Hubei, Peoples R China

来源：

IEEE ELECTRON DEVICE LETTERS | 2019年 / 40卷 / 10期

基金：

中国国家自然科学基金;

关键词：

Phase Change Memory (PCM); Ge2Sb2Te5 (GST); Multilevel Cell (MLC); low RESET current density; disorder; pre-operation; storage density; 3D cross-point;

D O I：

10.1109/LED.2019.2935890

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We have fabricated a pillar structure phase change memory (PCM) with the prototypical phase change material Ge2Sb2Te5. Using a Low Current SET (LCS) pre-operation, the devices can operate with an ultralow RESET current density and have multilevel cell (MLC) capability, and these features both contribute to high storage density. Specifically, the RESET current density is only 4.84 MA/cm(2), which is lowest among all the CMOS compatible PCM devices, and this ultra-low RESET current density enables the possibility to link with a two-terminal selector for 3D cross-point application. Meanwhile LCS makes MLC operation of our PCM more stable with a low operating current. In summary, this LCS pre-operation can greatly increase the storage density both by enabling integration with selectors for 3D cross-point and by stabilizing MLC operation when maintaining the feature size of PCM devices.

引用

页码：1595 / 1598

页数：4

共 24 条

[1] Energy-Efficient Phase-Change Memory with Graphene as a Thermal Barrier
Ahn, Chi-Yui
Fong, Scott W.
Kim, Yongsung
Lee, Seunghyun
Sood, Aditya
Neumann, Christopher M.
Ashegh, Mehdi
Goodson, Kenneth E.
Pop, Eric
Wong, H. -S. Philip
[J]. NANO LETTERS, 2015, 15 (10) : 6809 - 6814
[2] [Anonymous], 2012, P IEEE IRPS, DOI DOI 10.1109/IRPS.2012.6241871
[3] [Anonymous], 2017, IEEE Solid-State Circuits Mag, DOI DOI 10.1109/MSSC.2016.2622960
[4] Multilevel-Cell Phase-Change Memory: A Viable Technology
Athmanathan, Aravinthan
Stanisavljevic, Milos
Papandreou, Nikolaos
Pozidis, Haralampos
Eleftheriou, Evangelos
[J]. IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS, 2016, 6 (01) : 87 - 100
[5] Boniardi M, 2014, INT EL DEVICES MEET, P29
[6] Novel lithography-independent pore phase change memory
Breitwisch, M.
Nirschl, T.
Chen, C. F.
Zhu, Y.
Lee, M. H.
Lamorey, M.
Burr, G. W.
Joseph, E.
Schrott, A.
Philipp, J. B.
Cheek, R.
Happ, T. D.
Chen, S. H.
Zaidi, S.
Flaitz, P.
Bruley, J.
Dasaka, R.
Rajendran, B.
Rossnagel, S.
Yang, M.
Chen, Y. C.
Bergmann, R.
Lung, H. L.
Lam, C.
[J]. 2007 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, 2007, : 100 - +
[7] CHIEN WC, 2016, IEDM
[8] Reliable current changes with selectivity ratio above 109 observed in lightly doped zinc oxide films
Han, Un-Bin
Lee, Donghwa
Lee, Jang-Sik
[J]. NPG ASIA MATERIALS, 2017, 9 : e351 - e351
[9] Happ T., 2006, S VLSI TECHNOLOGY DI, P120, DOI DOI 10.1109/VLSIT.2006.1705246
[10] Kang M.J., 2011, IEEE INT ELECT DEVIC, P39, DOI [DOI 10.1109/IEDM.2011.6131478, 10.1109/IEDM.2011.6131478]

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