Self alignment method by buried mask implantation for Double Gate MOS and nano devices fabrication

Two methods to build submicronic self-aligned devices based on SOI MOS technology have been studied. The foreseen application of these techniques is the fabrication of self-aligned double gate SOI MOS transistors. Both of these methods make use of the implantation of a buried mask underneath the active silicon layer and aligned with the top gate. The mask is revealed by a selective etching between doped and undoped polysilicon. In one case Tetra-methyl Ammonium hydroxide solution (TMAH) is used to create a negative mask, etching the undoped zones. In the second case, a positive mask is revealed in a solution made of Hydrofluoric acid, Nitric acid and Acetic acid (HNA), etching the doped zones. Once the mask is revealed, the process differs from a normal CMOS process by the addition of two Chemical Mechanical Polishing (CMP) and bonding steps. The realized demonstrator proves the feasibility of both the positive and negative buried mask.