Preventing IC Piracy Using Reconfigurable Logic Barriers

被引：207

作者：

Baumgarten, Alex ^{[1
,2
]}

Tyagi, Akhilesh

Zambreno, Joseph ^{[1
]}

机构：

[1] Iowa State Univ, Dept Elect & Comp Engn, Ames, IA 50011 USA

[2] Microsoft, Redmond, WA USA

来源：

IEEE DESIGN & TEST OF COMPUTERS | 2010年 / 27卷 / 01期

基金：

美国国家科学基金会;

关键词：

D O I：

10.1109/MDT.2010.24

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Editor's note: Hardware metering to prevent IC piracy is a challenging and important problem. The authors propose a combinational locking scheme based on intelligent placement of the barriers throughout the design in which the objective is to maximize the effectiveness of the barriers and to minimize the overhead. -Farinaz Koushanfar, Rice University. © 2010 IEEE.

引用

页码：66 / 75

页数：10

共 11 条

[1]

Alkabani Y, 2007, IEEE IC CAD, P674

[2]

Alkabani YM, 2007, USENIX ASSOCIATION PROCEEDINGS OF THE 16TH USENIX SECURITY SYMPOSIUM, P291

[3]

[Anonymous], 2007, 2007 IEEE INT SOLID

[4]

Chakraborty R. S., 2008, P IEEE ACM INT C COM, P674

[5]

Huang JW, 2008, 2008 IEEE INTERNATIONAL WORKSHOP ON HARDWARE-ORIENTED SECURITY AND TRUST, P76, DOI 10.1109/HST.2008.4559056

[6]

Koushanfar Farinaz., 2001, Proceedings of the 4th International Workshop on Information Hiding, IHW '01, P81, DOI DOI 10.1007/3-540-45496-9_7

[7] The butterfly PUF protecting IP on every FPGA [J].

Kumar, Sandeep S. ;

Guajardo, Jorge ;

Maes, Roel ;

Schrijen, Geert-Jan ;

Tuyls, Pim .

2008 IEEE INTERNATIONAL WORKSHOP ON HARDWARE-ORIENTED SECURITY AND TRUST, 2008, :67-+

[8] A technique to build a secret key in integrated circuits for identification and authentication applications [J].

Lee, JW ;

Lim, DY ;

Gassend, B ;

Suh, GE ;

van Dijk, M ;

Devadas, S .

2004 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2004, :176-179

[9]

Lofstrom K., 2000, INT SOLID STATE CIRC, P372

[10]

Roy JA, 2008, DES AUT TEST EUROPE, P948

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