A direct mapping FPGA architecture for industrial process control applications

被引:20
作者
Welch, JT [1 ]
Carletta, J [1 ]
机构
[1] Univ Akron, Dept Elect Engn, Akron, OH 44325 USA
来源
2000 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS & PROCESSORS, PROCEEDINGS | 2000年
关键词
D O I
10.1109/ICCD.2000.878352
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Industrial process control is an untapped market for field programmable gate arrays (FPGAs) Programs used for industrial process control are traditionally written in a graphical language called relay ladder logic, and implemented on programmable logic controllers (PLCs). The mapping of ladder logic onto typical FPGAs is a lengthy process, and results are hard to verify. We propose an FPGA architecture implementing relay ladder logic directly. Conversion to Boolean algebra is eliminated. Technology, mapping is simple and direct. Placement and routing are also considerably simpler than in the general FPGA case. The architecture scales to devices of differing sizes and resources. This paper describes the FPGA architecture, and its role in high performance industrial process control.
引用
收藏
页码:595 / 598
页数:4
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