Liveness in timed and untimed systems

被引:24
作者
Segala, R [1 ]
Gawlick, R
Sogaard-Andersen, J
Lynch, N
机构
[1] Univ Bologna, Dept Comp Sci, I-40127 Bologna, Italy
[2] MIT, Comp Sci Lab, Cambridge, MA 02139 USA
[3] McKinsey & Co Inc, Helsinki, Finland
[4] Tech Univ Denmark, Dept Comp Sci, DK-2800 Lyngby, Denmark
基金
美国国家科学基金会;
关键词
automata; timed automata; I/O automata; liveness; receptiveness; formal verification; simulation techniques;
D O I
10.1006/inco.1997.2671
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
When proving the correctness of algorithms in distributed systems, one generally considers safety conditions and liveness conditions. The Input/Output (I/O) automaton model and its timed version have been used successfully, but have focused on safety conditions and on a restricted form of liveness called fairness. In this paper we develop a new I/O automaton model, and a new timed I/O automaton model, that permit the verification of general liveness properties on the basis of existing verification techniques. Our models include a notion of receptiveness which extends the idea of receptiveness of other existing formalisms, and enables the use of compositional Verification techniques. The presentation includes an embedding of the untimed model into the timed model which preserves all the interesting attributes of the untimed model. Thus, our models constitute a coordinated framework for the description of concurrent and distributed systems satisfying general liveness properties. (C) 1998 Academic Press.
引用
收藏
页码:119 / 171
页数:53
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