Dynamic current mode logic (DyCML), a new low-power high-performance logic family

被引：6

作者：

Allam, MW ^{[1
]}

Elmasry, MI ^{[1
]}

机构：

[1] Univ Waterloo, VLSI Res Grp, Dept Elect & Comp Engn, Waterloo, ON N2L 3G1, Canada

来源：

PROCEEDINGS OF THE IEEE 2000 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2000年

关键词：

D O I：

10.1109/CICC.2000.852699

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents a new logic style DyCML for low-power high-performance VLSI applications. The new logic family combines the speed, low supply voltage and noise immunity advantages of MCML circuits while achieving the low standby current and design simplicity features of dynamic circuits. Simulation results show that DyCML circuits are superior to CMOS and DCVS logic styles in terms of power and delay. A 16 bit DyCML Carry Look Ahead Adder (CLA) fabricated in 0.6 mu m achieves a delay of 1.1 ns while dissipating 21.2 mW at 400 MHz.

引用

页码：421 / 424

页数：4