FPGA- and Java']Java-based Rapid Prototyping of a Real-time H.264/AVC Decoder

被引：0
|
作者：
Petrovsky, Alexander [1 ]
Parfieniuk, Marek [1 ]
Stankevich, Andrew [2 ]
Petrovsky, Alexey [2 ]
机构：
[1] Bialystok Tech Univ, Dept Real Time Syst, Bialystok, Poland
[2] NTLab New Technol Lab, Minsk, BELARUS
来源：
MIXDES 2009: PROCEEDINGS OF THE 16TH INTERNATIONAL CONFERENCE MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 2009年
关键词：
H.264; decoder; Plasma RISC; Xilinx FPGA; !text type='Java']Java[!/text;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The paper reports on an attempt to implement a real-time hardware H.264 video decoder. The initial results of the project are presented, especially a customized RISC core and some digital modules, both of which have been implemented in Xilinx FPGA. The former has to serve as a host processor that supervises the latter, which speed up the essential decoding subtasks. The system is designed and tested based on a software decoder and diagnostic tool, which are implemented in Java using the object-oriented paradigm. Based on our experiences, we recommend the combination of FPGA and the Java platform as a good basis for rapid prototyping of advanced DSP algorithms.
引用
收藏
页码：629 / +
页数：2
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