Development of advanced Nb process for SFQ circuits

被引：59

作者：

Nagasawa, S ^{[1
]}

Hinode, K ^{[1
]}

Satoh, T ^{[1
]}

Akaike, H ^{[1
]}

Kitagawa, Y ^{[1
]}

Hidaka, M ^{[1
]}

机构：

[1] ISTEC, Superconduct Res Lab, Tsukuba, Ibaraki 3058501, Japan

来源：

PHYSICA C-SUPERCONDUCTIVITY AND ITS APPLICATIONS | 2004年 / 412卷

关键词：

Nb fabrication process; planarization; SFQ circuits; superconducting LSI;

D O I：

10.1016/j.physc.2003.12.097

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

We have been developing a 10-kA/cm(2) advanced Nb process in order to fabricate larger scale and higher speed SFQ circuits with over 100k junctions. We have proposed a planarized multi-layer structure, which consists of a Nb/AlOx/Nb junction layer, 4 Nb wiring layers, a Nb layer for DC power, a Nb ground plane, SiO2 insulator layers, and a Mo resistor layer. Process technologies for fabricating 1.0-mum(2) junctions with high J(C) of 10 kA/cm(2) and 1sigma of 1.4% and Mo resistors with R-square of 2.4 Omega have been developed. A new planarization technology called caldera, which is applicable to patterns of various sizes, has been developed. This process consists of reactive ion etching (RIE) with a reverse mask, bias sputtering, and mechanical polishing planarization (MPP). We have now successfully developed all the component technologies required for the advanced Nb process. We have implemented these technologies for the through process and fabricated a structure with six planarized Nb layers, including Nb/AlOx/Nb junctions, Mo resistors, and contacts. In this structure, we obtained excellent current-voltage characteristics for the junctions, sufficient superconducting characteristics for the contacts, and good insulation characteristics between the wiring layers. (C) 2004 Elsevier B.V. All rights reserved.

引用

页码：1429 / 1436

页数：8

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