Reconfigurable FPGA implementation of neural networks

被引：25

作者：

Hajduk, Zbigniew ^{[1
]}

机构：

[1] Rzeszow Univ Technol, Ul Powstancow Warszawy 12, PL-35959 Rzeszow, Poland

来源：

NEUROCOMPUTING | 2018年 / 308卷

关键词：

FPGA; Neural networks; HARDWARE IMPLEMENTATION;

D O I：

10.1016/j.neucom.2018.04.077

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

This brief paper presents two implementations of feed-forward artificial neural networks in FPGAs. The implementations differ in the FPGA resources requirement and calculations speed. Both implementations exercise floating point arithmetic, apply very high accuracy activation function realization, and enable easy alteration of the neural network's structure without the need of a re-implementation of the entire FPGA project. (C) 2018 Elsevier B.V. All rights reserved.

引用

页码：227 / 234

页数：8

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