A Prototype Pixel Readout IC for High Count Rate X-Ray Imaging Systems in 90 nm CMOS Technology

被引:29
作者
Szczygiel, R. [1 ]
Grybos, P. [1 ]
Maj, P. [1 ]
机构
[1] AGH Univ Sci & Technol, Dept Measurement & Instrumentat, PL-30059 Krakow, Poland
关键词
Hybrid pixel detector; matching; X-ray imaging; LOW-NOISE; FRONT-END; CHIP; DETECTORS; WORKING; DESIGN; MODE;
D O I
10.1109/TNS.2010.2044664
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We report on the design of a prototype IC called PX90 dedicated for readout of hybrid semiconductor detectors used for X-ray imaging applications. The PX90 has dimensions of 4 mm x 4 mm and was designed in CMOS 90 nm technology with 9 metal layers. The core of the IC is a matrix of 40 x 32 pixels with 100 mu m x 100 mu m pixel size. A 60 mu m x 60 mu m square passivation opening in each pixel allows connecting PX90 to a semiconductor detector using stud bump bonding technique. Each pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two second stage amplifiers, two discriminators and two 16-bit ripple counters. The stages are DC-coupled and the front-end electronics uses a fully differential readout scheme. To minimize the effective threshold spread at the discriminators inputs, one 8-bit and one 7-bit trim DACs are used. The PX90 can operate in continuous readout mode and in readout mode separate from exposure. The readout of each pixel has some additional functionality, like compression mode or readout of only given number of bits from each pixel. The data are read out via a single LVDS output with 200 Mbps rate. The effective pulse shaping at the discriminator input is 27 ns and it is mainly determined by the time constants of the CSA. The measurements show an ENC of 204 e(-) rms without detector and 240 e(-) rms with stud bump bonded detector. The average gain is 28 mu V/e(-) and the effective threshold variation (using trim DAC) is 1.8 mV rms on one sigma level. Each pixel contains about 1800 transistors and has a static power consumption of mu 47 Wfor nominal bias condition.
引用
收藏
页码:1664 / 1674
页数:11
相关论文
共 24 条
[1]   Substrate noise coupling in SoC design: Modeling, avoidance, and validation [J].
Afzali-Kusha, Ali ;
Nagata, Makoto ;
Verghese, Nishath K. ;
Allstot, David J. .
PROCEEDINGS OF THE IEEE, 2006, 94 (12) :2109-2138
[2]  
[Anonymous], IEEE T NUCL SCI
[3]   The medipix3 prototype, a pixel readout chip working in single photon counting mode with improved spectrometric performance [J].
Ballabriga, R. ;
Campbell, M. ;
Heijne, E. H. M. ;
Llopart, X. ;
Tlustos, L. .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2007, 54 (05) :1824-1829
[4]   A pixel read-out chip for the PILATUS project [J].
Bronnimann, C ;
Baur, R ;
Eikenberry, EF ;
Kohout, S ;
Lindner, M ;
Schmitt, B ;
Horisberger, R .
NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT, 2001, 465 (01) :235-239
[5]  
DINAPOLI R, 2004, THESIS U MONTPELLIER
[6]   AN ANALYTICAL MOS-TRANSISTOR MODEL VALID IN ALL REGIONS OF OPERATION AND DEDICATED TO LOW-VOLTAGE AND LOW-CURRENT APPLICATIONS [J].
ENZ, CC ;
KRUMMENACHER, F ;
VITTOZ, EA .
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 1995, 8 (01) :83-114
[7]   A photon counting pixel chip with energy windowing [J].
Fischer, P ;
Helmich, A ;
Lindner, M ;
Wermes, N ;
Blanquart, L .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2000, 47 (03) :881-884
[8]   A low-noise, low-power CMOS SOI readout front-end for silicon detectors leakage current compensation with capability [J].
Hu, Y ;
Deptuch, G ;
Turchetta, R ;
Guo, C .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-FUNDAMENTAL THEORY AND APPLICATIONS, 2001, 48 (08) :1022-1030
[9]   EXACT SIMULATION OF FEEDBACK-CIRCUIT PARAMETERS [J].
HURST, PJ .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1991, 38 (11) :1382-1389
[10]   Design strategies and decoupling techniques for reducing the effects of electrical interference in mixed-mode IC's [J].
Ingels, M ;
Steyaert, MSJ .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1997, 32 (07) :1136-1141