Contact Resistance of the Micro Bumps in a Typical TSV Structure

被引：0

作者：

Lwo, Ben-Je

Teng, Chia-Liang ^{[1
]}

Ni, Tom ^{[2
]}

Lu, Shirley ^{[2
]}

机构：

[1] Natl Def Univ, Chung Cheng Inst Technol, Dept Mech & Aerosp Engn, Taipei, Taiwan

[2] Powertech Technol Inc, Hsinchu, Taiwan

来源：

2016 IEEE 37TH INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY (IEMT) & 18TH ELECTRONICS MATERIALS AND PACKAGING (EMAP) CONFERENCE | 2016年

关键词：

D O I：

暂无

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

Contact resistance of the micro bumps in a PBGA (Plastic Ball Grid Array) packaging with TSV (Through Silicon Via) structure was characterized in this study. To this end, a self-designed TSV daisy chain circuit was proposed as the measurement paths and the test samples were made with commercialized packaging process to simulate real product behavers. Based on circuit model analysis, contact resistance for the micro bump were extracted from a systematic experimental design and measurement.

引用

页数：4

共 5 条

[1] Contact resistance of the chip-on-glass bonded 48Sn-52In solder joint [J].