A 10-bit Low-Power Small-Area High-Swing CMOS DAC

The design and measurements of a prototype general purpose digital to analog converter for readout systems in high energy physics experiments are presented. The main goals for the proposed DAC are low power consumption, small die area and high-swing voltage output. The 10-bit DAC design is based on a current steering architecture which includes a high-swing class AB output amplifier. The prototype ASIC is fabricated using 2P-4M 0.35-mu m technology. Measurements of maximum differential (DNL) and integral (INL) nonlinearity both show 0.42 LSB. The total power consumption is below 0.6 mW while the core area is 0.18 mm(2).