共 50 条
[41]
Parallel voting RANSAC and its implementation on FPGA
[J].
Dianzi Yu Xinxi Xuebao/Journal of Electronics and Information Technology,
2014, 36 (05)
:1145-1150
[42]
Design and Implementation of a Handshake Join Architecture on FPGA
[J].
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS,
2012, E95D (12)
:2919-2927
[43]
Parallel memory architecture for elliptic curve cryptography over GF(p) aimed at efficient FPGA implementation
[J].
JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY,
2008, 51 (01)
:39-55
[44]
Dynamically Reconfigurable Parallel Architecture Implementation of 2D Convolution for Image Processing over FPGA
[J].
2ND INTERNATIONAL CONFERENCE ON ELECTRICAL ENGINEERING AND INFORMATION COMMUNICATION TECHNOLOGY (ICEEICT 2015),
2015,
[45]
High Performance FPGA-based Implementation of a Parallel Multiplier-Accumulator
[J].
MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, MIXDES 2013,
2013,
:485-489
[46]
A FPGA-based parallel semi-naive Bayes classifier implementation
[J].
IEICE ELECTRONICS EXPRESS,
2013, 10 (19)
[47]
Parallel RX algorithm implementation based on the FPGA and multi-DSP system
[J].
Zhao, B. (zbw8200980@163.com),
1600, Science Press (41)
:152-156
[48]
A fast traffic lane detection system based on parallel processors and FPGA implementation
[J].
Dianzi Yu Xinxi Xuebao/Journal of Electronics and Information Technology,
2010, 32 (12)
:2901-2906
[49]
An FPGA based parametrisable system for parallel 2-D FFT implementation
[J].
CCCT 2003, VOL 3, PROCEEDINGS,
2003,
:267-270
[50]
FPGA Implementation of Low Power DTCWT Based OFDM Architecture for Smart Meters
[J].
INTERNATIONAL CONFERENCE ON INTELLIGENT DATA COMMUNICATION TECHNOLOGIES AND INTERNET OF THINGS, ICICI 2018,
2019, 26
:256-265