Implementation of a parallel SAD based wavefront sensor architecture on FPGA

被引:1
作者
Kincses, Zoltan [1 ]
Nagy, Zoltan [2 ]
Orzo, Laszlo [2 ]
Szolgay, Peter [2 ]
Mezo, Gyoergy [3 ]
机构
[1] Univ Pannonia, Dept Elect Engn & Informat Syst, Veszprem, Hungary
[2] Hungarian Acad Sci, Inst Comp & Automat, Cellular Sensory & Wave Comp Lab, Budapest, Hungary
[3] Heliophys Observat, Debrecen, Hungary
来源
2009 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1 AND 2 | 2009年
关键词
FPGA; wavefront sensor; SAD; ADAPTIVE OPTICS;
D O I
10.1109/ECCTD.2009.5275110
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Wavefront aberration caused by turbulent or rapidly changing media can considerably degrade the performance of an imaging system. Adaptive optics can dynamically compensate these wavefront distortions and so provide corrected imaging. We developed an affordable adaptive optic system which combines CMOS sensor and LCOS display technology with the FPGA devices parallel computing capabilities. High speed and accurate wavefront sensor is fundamental part of any adaptive optic system. In this paper, an efficient FPGA implementation of the Sum of Absolute Differences (SAD) algorithm is introduced which accomplish correlation based wavefront sensing. This architecture was implemented on a Spartan-3 FPGA and is capable to measure the incoming wavefront at the speed of sensor data acquisition speed.
引用
收藏
页码:823 / +
页数:2
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