Investigation of a Class-J Mode Power Amplifier in Presence of a Second-Harmonic Voltage at the Gate Node of the Transistor

In this paper, performance of class-J mode power amplifiers (PAs) is studied when a second-harmonic voltage component is added to the input node of the device. Theoretical formulations for the optimum load impedances, output power, and drain efficiency are developed for this case, and it is shown that the inclusion of a proper second-harmonic voltage at the gate node of the transistor improves the drain efficiency and output power. To check the accuracy of the theoretical analyses and the simulation results, a proof-of-concept 1-GHz 0.65-W class-J PA is fabricated in a 0.25-mu m AlGaAs-InGaAs pHEMT technology. The nonlinear gate-source capacitor (C-GS) of the transistor is employed to generate the required second-harmonic voltage at the gate node. With chip dimensions of 1.57 x 1.0 mm(2), the designed PA achieves a 62% power added efficiency and an 18 dB small-signal gain at 1 GHz frequency.