共 80 条
[1]
An Effective Approach for Implementing Sparse Matrix-Vector Multiplication on Graphics Processing Units
[J].
2012 IEEE 14TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING AND COMMUNICATIONS & 2012 IEEE 9TH INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS (HPCC-ICESS),
2012,
:453-460
[2]
[Anonymous], MSRTR201295
[3]
[Anonymous], 2013, Intel Xeon Phi coprocessor architecture and tools: the guide for application developers
[4]
[Anonymous], 2008, NVIDIA Technical Report NVR-2008-004
[5]
[Anonymous], 1994, TEMPLATES SOLUTION L, DOI DOI 10.1137/1.9781611971538
[6]
[Anonymous], 2011, ACTA TECH CSAV
[7]
[Anonymous], 2005, Proceedings of the 16th Annual Workshop on Circuits, Systems and Signal Processing
[8]
Asanovic K., 2006, The landscape of parallel computing research: A view from berkeley
[9]
An Efficient Two-Dimensional Blocking Strategy for Sparse Matrix-Vector Multiplication on GPUs
[J].
PROCEEDINGS OF THE 28TH ACM INTERNATIONAL CONFERENCE ON SUPERCOMPUTING, (ICS'14),
2014,
:273-282
[10]
Fast Sparse Matrix-Vector Multiplication on GPUs for Graph Applications
[J].
SC14: INTERNATIONAL CONFERENCE FOR HIGH PERFORMANCE COMPUTING, NETWORKING, STORAGE AND ANALYSIS,
2014,
:781-792