Electrodeposition of copper-tin alloy thin films for microelectronic applications

被引：33

作者：

Padhi, D ^{[1
]}

Gandikota, S ^{[1
]}

Nguyen, HB ^{[1
]}

McGuirk, C ^{[1
]}

Ramanathan, S ^{[1
]}

Yahalom, J ^{[1
]}

Dixit, G ^{[1
]}

机构：

[1] Appl Mat Inc, Santa Clara, CA 95054 USA

来源：

ELECTROCHIMICA ACTA | 2003年 / 48卷 / 08期

关键词：

copper-tin alloy electrodeposition; alloy thin film co-deposition; electromigration in interconnects; alloy deposition under mass-transfer control; under potential deposition;

D O I：

10.1016/S0013-4686(02)00774-0

中图分类号：

O646 [电化学、电解、磁化学];

学科分类号：

081704 ;

摘要：

The continuing shrink in device size has generated great interest to create interconnects with low resistivity and superior resistance to electromigration (EM) and stress migration (SM) in comparison to the existing Al or Al-alloy interconnections. Copper has become the metal of choice to meet the needs of present and future generation devices. In order to improve the intrinsic resistance of copper to EM/SM induced failure, alloying elements can be added into copper metallurgy. In the present investigation, we discuss a method to co-deposit an alloy of copper and tin in sub-microscopic features with high aspect ratio using a sulfate bath. It is observed that a small amount tin begins to co-deposit at potentials smaller than the equilibrium reduction potential. Under activation control regime, the composition is not affected by current density. The results of this study conclude that substantial tin deposition occurs upon onset of mass-transport limitation. It is found that a finite amount of time is required before electrolysis is controlled by mass-transfer. The transition time and hence, the composition of the plated film is affected by the hydrodynamic conditions, current density, and electrolyte composition. These factors must be taken into account in order to control the composition profile of tin in vias and trenches. (C) 2002 Elsevier Science Ltd. All rights reserved.

引用

页码：935 / 943

页数：9

共 10 条

[1] Damascene copper electroplating for chip interconnections [J].