Analysis of analog parameters in NW-TFETs with Si and SiGe source composition at high temperatures

In this work, the analysis of analog parameters in Tunnel-FET devices is performed at high temperatures and for two different source compositions (Si and Si0.73Ge0.27). For high gate voltage, band-to-band tunneling is the dominant mechanism, and due to that, a degradation in output conductance (g(D)), early voltage (V-EA) and intrinsic voltage gain (A(V)) was observed In the SiGe devices, trap assisted tunneling is the dominant mechanism at low gate bias, which improves g(D), V-EA and consequently A(V). The temperature increases both I-ON and I-OFF current leading to a degradation of g(D), V-EA and A(V). The transistor efficiency (gm/I-D) decreases at high temperature in the "weak inversion region" and improves in the "strong inversion region" at high current.