An Overturned Charge Injection Synaptic Transistor With a Floating-Gate for Neuromorphic Hardware Computing

被引:5
作者
Kim, Myung-Su [1 ]
Kim, Jin-Ki [1 ]
Yun, Gyeong-Jun [1 ]
Yu, Ji-Man [1 ]
Han, Joon-Kyu [1 ]
Lee, Jung-Woo [1 ]
Seo, Seokho [1 ]
Choi, Shinhyun [1 ]
Choi, Yang-Kyu [1 ]
机构
[1] Korea Adv Inst Sci & Technol KAIST, Sch Elect Engn, Daejeon 34141, South Korea
基金
新加坡国家研究基金会;
关键词
Nonvolatile memory; Logic gates; Synapses; Linearity; Silicon; Depression; Transistors; Charge valve layer; floating gate; neuromorphic; potentiation and depression; overturned charge injection synaptic transistor (OCIST); synapse; SILICON-NITRIDE; DEVICES;
D O I
10.1109/LED.2022.3194556
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An overturned charge injection synaptic transistor (OCIST) is experimentally demonstrated for neuromorphic hardware computing. The structure of the OCIST is similar to that of a conventional floating gate memory except for the directionality of charge injection. The charge valve layer (CVL) of the OCIST is analogous to a blocking oxide of a floating gate memory device. The OCIST employs the CVL to control charge flow to the floating gate, while the floating gate memory utilizes a tunneling oxide as a gate oxide for this. Because the CVL and the gate oxide are decoupled in the OCIST, the CVL is independently engineerable without any sacrifice of the gate oxide quality and scalability. Moreover, the selection spectrum for the CVL material is wide. Linearity and symmetry of synaptic potentiation and depression were improved. In addition, a classification accuracy of 92.4% for handwritten digits in the MNIST dataset was achieved.
引用
收藏
页码:1440 / 1443
页数:4
相关论文
共 21 条
[1]   High-Density and Near-Linear Synaptic Device Based on a Reconfigurable Gated Schottky Diode [J].
Bae, Jong-Ho ;
Lim, Suhwan ;
Park, Byung-Gook ;
Lee, Jong-Ho .
IEEE ELECTRON DEVICE LETTERS, 2017, 38 (08) :1153-1156
[2]   Experimental Demonstration and Tolerancing of a Large-Scale Neural Network (165 000 Synapses) Using Phase-Change Memory as the Synaptic Weight Element [J].
Burr, Geoffrey W. ;
Shelby, Robert M. ;
Sidler, Severin ;
di Nolfo, Carmelo ;
Jang, Junwoo ;
Boybat, Irem ;
Shenoy, Rohit S. ;
Narayanan, Pritish ;
Virwani, Kumar ;
Giacometti, Emanuele U. ;
Kuerdi, Bulent N. ;
Hwang, Hyunsang .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2015, 62 (11) :3498-3507
[4]  
Gusev E. P., 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224), p20.1.1, DOI 10.1109/IEDM.2001.979537
[5]   Recent Progress in Three-Terminal Artificial Synapses: From Device to System [J].
Han, Hong ;
Yu, Haiyang ;
Wei, Huanhuan ;
Gong, Jiangdong ;
Xu, Wentao .
SMALL, 2019, 15 (32)
[6]   A Recoverable Synapse Device Using a Three-Dimensional Silicon Transistor [J].
Hur, Jae ;
Jang, Byung Chul ;
Park, Jihun ;
Moon, Dong-Il ;
Bae, Hagyoul ;
Park, Jun-Young ;
Kim, Gun-Hee ;
Jeon, Seung-Bae ;
Seo, Myungsoo ;
Kim, Sungho ;
Choi, Sung-Yool ;
Choi, Yang-Kyu .
ADVANCED FUNCTIONAL MATERIALS, 2018, 28 (47)
[7]   Optimization of Conductance Change in Pr1-xCaxMnO3-Based Synaptic Devices for Neuromorphic Systems [J].
Jang, Jun-Woo ;
Park, Sangsu ;
Burr, Geoffrey W. ;
Hwang, Hyunsang ;
Jeong, Yoon-Ha .
IEEE ELECTRON DEVICE LETTERS, 2015, 36 (05) :457-459
[8]  
Jerry M, 2017, INT EL DEVICES MEET
[9]   Nanoscale Memristor Device as Synapse in Neuromorphic Systems [J].
Jo, Sung Hyun ;
Chang, Ting ;
Ebong, Idongesit ;
Bhadviya, Bhavitavya B. ;
Mazumder, Pinaki ;
Lu, Wei .
NANO LETTERS, 2010, 10 (04) :1297-1301
[10]   Deep learning [J].
LeCun, Yann ;
Bengio, Yoshua ;
Hinton, Geoffrey .
NATURE, 2015, 521 (7553) :436-444