Millisecond Annealing Junctions for Near-Scaling-Limit Bulk CMOS Using Raised Source/Drain Extensions

被引:2
作者
Hane, Masami [1 ]
机构
[1] Albany NanoTech, IBM, Albany, NY USA
来源
ADVANCED GATE STACK, SOURCE/DRAIN, AND CHANNEL ENGINEERING FOR SI-BASED CMOS 5: NEW MATERIALS, PROCESSES, AND EQUIPMENT | 2009年 / 19卷 / 01期
关键词
D O I
10.1149/1.3118931
中图分类号
O646 [电化学、电解、磁化学];
学科分类号
081704 ;
摘要
This paper reviews an effective way to pursue further scaling of planar-bulk CMOSFETs featuring "effectively" shallow junctions in selective epitaxial growth of the raised source/drain extension (RSDext) regions processed with high-temperature millisecond annealing (MSA).
引用
收藏
页码:63 / 70
页数:8
相关论文
共 4 条
[1]   Characterization of ultrashallow junctions using frequency-dependent junction photovoltage and its lateral attenuation [J].
Faifer, V. N. ;
Current, M. I. ;
Schroder, D. K. .
APPLIED PHYSICS LETTERS, 2006, 89 (15)
[2]  
NARIHIRO M, 2006, P RTP C, P147
[3]   Pushing planar bulk CMOSFET scaling to its limit by ultimately shallow diffusion-less junction [J].
Uejima, K. ;
Yako, K. ;
Ikarashi, N. ;
Narihiro, M. ;
Tanaka, M. ;
Nagumo, T. ;
Mineji, A. ;
Shishiguchi, S. ;
Hane, M. .
2007 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2, 2007, :151-154
[4]  
Yako K, 2008, INT EL DEVICES MEET, P909