On the degradation of p-MOSFETs in analog and RF circuits under inhomogeneous negative bias temperature stress

被引:24
作者
Schlünder, C [1 ]
Brederlow, R [1 ]
Ankele, B [1 ]
Goser, ALK [1 ]
Thewes, R [1 ]
机构
[1] Infineon Technol, D-81730 Munich, Germany
来源
41ST ANNUAL PROCEEDINGS: INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM | 2003年
关键词
D O I
10.1109/RELPHY.2003.1197712
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The effect of inhomogeneous Negative Bias Temperature Stress (NBTS) applied to p-MOS transistors under analog and RF CMOS operating conditions is investigated. Experimental data of a 0.18 mum standard CMOS process are presented and an analytical model is derived to physically explain the effect of stress on the device characteristics. The impact of inhomogeneous NBTS on device lifetime is considered and compared to the homogeneous case.
引用
收藏
页码:5 / 10
页数:6
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