A Spur-Reduction Delta-Sigma Modulator with Efficient Dithering for Fractional Frequency Synthesizer

被引:0
|
作者
Zhou, Shuai [1 ]
Fan, Xiaoteng [1 ]
Liu, Liang [1 ]
He, Panfeng [1 ]
Fan, Jiwei [1 ]
机构
[1] China Elect Technol Grp Corp, Inst 41, Xiangjiang Rd 98, Qingdao 266555, Peoples R China
来源
PROCEEDINGS OF 2016 IEEE ADVANCED INFORMATION MANAGEMENT, COMMUNICATES, ELECTRONIC AND AUTOMATION CONTROL CONFERENCE (IMCEC 2016) | 2016年
关键词
spur tones; delta-sigma modulator; dither; frequency synthesizer;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
A spur-reduction dither structure is presented to achieve low fractional spurs for a wideband frequency synthesizer. The dither structure is added to the digital multi-stage noise shaping (MASH) Delta-Sigma Modulator (DSM) for the wideband fractional-N frequency synthesizer. Traditionally, the MASH can generate spur tone in fractional frequency synthesizers. We propose to add a simple 8-bit linear feedback shift register (LFSR) to reduce spur tone. The MASH Structure is dithered using FPGA to reduce the spur. It improves in-band fractional spur about 13dBc/Hz at 50 kHz offset and achieves high frequency resolution of 0.001Hz.
引用
收藏
页码:1473 / 1476
页数:4
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