Dual-Path LC VCO Design With Partitioned Coarse-Tuning Control in 65 nm CMOS

被引:8
作者
Sun, Yuanfeng [1 ]
Yu, Xueyi [2 ]
Rhee, Woogeun [1 ]
Ko, Sangsoo [3 ]
Choo, Wooseung [3 ]
Park, Byeong-Ha [3 ]
Wang, Zhihua [1 ]
机构
[1] Tsinghua Univ, Inst Microelect, Beijing 100084, Peoples R China
[2] Tsinghua Univ, Dept Elect Engn, Beijing 100084, Peoples R China
[3] Samsung Elect Co Ltd, RF Dev Team, Yongin, South Korea
关键词
CMOS integrated circuits; LC-VCO; oscillators; phase-locked loops; phase noise; voltage-controlled oscillators (VCOs); BAND; PLL;
D O I
10.1109/LMWC.2010.2040221
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This letter describes a dual-path LC voltage controlled oscillator (VCO) design that reduces both coarse-tuning and fine-tuning sensitivities. By using a combination of discrete and continuous tuning methods for the coarse-tuning control, a very high gain ratio between the coarse-tuning path and the fine-tuning path can be avoided, significantly alleviating noise and coupling problems due to high coarse-tuning gain. A 3.03-3.67 GHz dual-path VCO in 65 nm CMOS exhibits -120.7 dBc/Hz at a 400 kHz offset from a 1.73 GHz carrier, showing better performance than the conventional single-path VCO that is implemented for comparison.
引用
收藏
页码:169 / 171
页数:3
相关论文
共 14 条
  • [1] A wideband low phase-noise LC-VCO with programmable KVCO
    Broussev, Svetozar S.
    Lehtonen, Tapio A.
    Tchamov, Nikolay T.
    [J]. IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, 2007, 17 (04) : 274 - 276
  • [2] Wideband VCO with simultaneous switching of frequency band, active core, and varactor size
    Hauspie, Dries
    Park, Eun-Chul
    Craninckx, Jan
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2007, 42 (07) : 1472 - 1480
  • [3] A filtering technique to lower LC oscillator phase noise
    Hegazi, E
    Sjöland, H
    Abidi, AA
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2001, 36 (12) : 1921 - 1930
  • [4] Kim SY, 2005, PROC WRLD ACAD SCI E, V4, P12
  • [5] Lin TY, 2008, IEEE RAD FREQ INTEGR, P347, DOI 10.1109/RFIC.2008.4561460
  • [6] A versatile 90-nm CMOS charge-pump PLL for SerDes transmitter clocking
    Loke, Alvin L. S.
    Barnes, Robert K.
    Wee, Tin Tin
    Oshima, Michael M.
    Moore, Charles E.
    Kennedy, Ronald R.
    Gilsdorf, Michael J.
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2006, 41 (08) : 1894 - 1907
  • [7] A 4.39-5.26 GHz LC-Tank CMOS Voltage-Controlled Oscillator With Small VCO-Gain Variation
    Moon, Young-Jin
    Roh, Yong-Seong
    Jeong, Chan-Young
    Yoo, Changsik
    [J]. IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, 2009, 19 (08) : 524 - 526
  • [8] A 580-μW 1.8-6 GHz multiband switched-resonator SiGeVCO with 0.3-V supply voltage
    Mukhopadhyay, Rajarshi
    Lee, Chang-Ho
    Laskar, Joy
    [J]. IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, 2007, 17 (11) : 793 - 795
  • [9] Modeling, design and characterization of a new low-jitter analog dual tuning LC-VCO PLL architecture
    Nonis, R
    Da Dalt, N
    Palestri, P
    Selmi, L
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2005, 40 (06) : 1303 - 1309
  • [10] PI D, 2002, P IEEE AS SOL STAT C, P111