Crossbar RRAM Arrays: Selector Device Requirements During Write Operation

被引:125
作者
Kim, Sungho [1 ]
Zhou, Jiantao [1 ]
Lu, Wei D. [1 ]
机构
[1] Univ Michigan, Dept Elect Engn & Comp Sci, Ann Arbor, MI 48109 USA
基金
美国国家科学基金会; 新加坡国家研究基金会;
关键词
Crossbar; resistive random access memory (RRAM); selector device; sneak path; write margin; write scheme;
D O I
10.1109/TED.2014.2327514
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A comprehensive analysis of write operations (SET and RESET) in a resistance-change memory (resistive random access memory) crossbar array is carried out. Three types of resistive switching memory cells-nonlinear, rectifying-SET, and rectifying-RESET-are compared with each other in terms of voltage delivery, current delivery, and power consumption. Two different write schemes, V/2 and V/3, were considered, and the V/2 write scheme is preferred due to much lower power consumption. A simple numerical method was developed that simulates entire current flows and node voltages within a crossbar array and provides a quantitative tool for the accurate analysis of crossbar arrays and guidelines for developing reliable write operation.
引用
收藏
页码:2820 / 2826
页数:7
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