An algorithm of timing-driven float pin Steiner tree construction

被引：0

作者：

Huang, L ^{[1
]}

Chen, LQ ^{[1
]}

Zhao, WQ ^{[1
]}

Tang, PS ^{[1
]}

机构：

[1] Fudan Univ, Dept Elect Engn, Shanghai 200433, Peoples R China

来源：

FIFTH INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN & COMPUTER GRAPHICS, VOLS 1 AND 2 | 1997年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In Vtr layout procedure, Steiner tree is often applied to implement tile global routing, and it can be also used to do the detailed relating when considering the obstructs between sub-circuit unit or models. This payer proposes the concept of float pin to construct Steiner tree. With the development of IC technology, timing problem becomes more and more important, Applying Elmore delay model and taking the multi-layer muting into account, we give out an algorithm TAFLOST of constructing float pin timing-driven Steiner tree.

引用

页码：586 / 589

页数：4