Simulation of nonequilibrium thermal effects in power LDMOS transistors

被引:61
作者
Raman, A [1 ]
Walker, DG [1 ]
Fisher, TS [1 ]
机构
[1] Vanderbilt Univ, Dept Mech Engn, Nashville, TN 37235 USA
基金
美国国家科学基金会;
关键词
D O I
10.1016/S0038-1101(03)00066-2
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The present work considers electrothermal simulation of LDMOS devices and associated nonequilibrium effects. Simulations have been performed on three kinds of LDMOS:bulk Si, partial SOI and full SOL Differences between equilibrium and nonequilibrium modeling approaches are examined. The extent and significance of thermal nonequilibrium is determined from phonon temperature distributions obtained using a common electronic solution and three different heating models (Joule heating, electron/lattice scattering, phonon scattering). The results indicate that, under similar operating conditions, nonequilibrium behavior is more significant in the case of full SOI devices, where the extent of nonequilibrium is estimated to be twice that of the partial SOI device and four times that of the bulk device. Time development of acoustic phonon and lattice temperatures in the electrically active region indicates that nonequilibrium effects are significant for times less than 10 ns. (C) 2003 Elsevier Science Ltd. All rights reserved.
引用
收藏
页码:1265 / 1273
页数:9
相关论文
共 19 条
[1]  
[Anonymous], 1991, SEMICONDUCTORS
[2]   NUMERICAL-SIMULATION OF SUBMICROMETER DEVICES INCLUDING COUPLED NONLOCAL TRANSPORT AND NONISOTHERMAL EFFECTS [J].
APANOVICH, Y ;
BLAKEY, P ;
COTTLE, R ;
LYUMKIS, E ;
POLSKY, B ;
SHUR, A ;
TCHERNIAEV, A .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1995, 42 (05) :890-898
[3]  
BALIGA BJ, 1980, INT EL DEV M, P102
[4]   Concurrent thermal and electrical modeling of sub-micrometer silicon devices [J].
Lai, J ;
Majumdar, A .
JOURNAL OF APPLIED PHYSICS, 1996, 79 (09) :7353-7361
[5]  
Langtangen H. P, 1999, COMPUTATIONAL PARTIA
[6]   Heating mechanisms of LDMOS and LIGBT in ultrathin SOI [J].
Leung, YK ;
Paul, AK ;
Goodson, KE ;
Plummer, JD ;
Wong, SS .
IEEE ELECTRON DEVICE LETTERS, 1997, 18 (09) :414-416
[7]   Modelling of self-heating effect in thin SOI and Partial SOI LDMOS power devices [J].
Lim, HT ;
Udrea, F ;
Garner, DM ;
Milne, WI .
SOLID-STATE ELECTRONICS, 1999, 43 (07) :1267-1280
[8]  
Longtin JP, 1998, S CHEM MECH, P119
[9]   EFFECT OF GATE VOLTAGE ON HOT-ELECTRON AND HOT-PHONON INTERACTION AND TRANSPORT IN A SUBMICROMETER TRANSISTOR [J].
MAJUMDAR, A ;
FUSHINOBU, K ;
HIJIKATA, K .
JOURNAL OF APPLIED PHYSICS, 1995, 77 (12) :6686-6694
[10]  
MANZINI S, 1996, P IEEE ISPSD, P75