Comparator trees for winner-take-all circuits

被引：16

作者：

Hendry, DC ^{[1
]}

机构：

[1] Univ Aberdeen, Kings Coll, Dept Engn, Aberdeen AB24 3UE, Scotland

来源：

NEUROCOMPUTING | 2004年 / 62卷

关键词：

self organising map; hardware implementations; winner-take-all; comparator trees;

D O I：

10.1016/j.neucom.2004.05.002

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

This paper presents architectures for comparator trees capable of finding the minimum value of a large number of inputs. Such circuits are of general applicability although the intended application for which the circuits were designed is the winner-take-all function of a digital implementation of a neural network based on the self organising map. Mechanisms for reducing delay based on look-ahead logic within individual comparators and mechanisms based on multiplexor architectures of a comparator are compared for both propagation delay and area. (C) 2004 Elsevier B.V. All rights reserved.

引用

页码：389 / 403

页数：15

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