Universality of off-state degradation in drain extended NMOS transistors

被引：0

作者：

Varghese, D. ^{[1
]}

Kufluoglu, H. ^{[1
]}

Reddy, V. ^{[2
]}

Shichijo, H. ^{[2
]}

Krishnan, S. ^{[2
]}

Alam, M. A. ^{[1
]}

机构：

[1] Purdue Univ, W Lafayette, IN 47907 USA

[2] Texas Instruments Inc, Dallas, TX 75243 USA

来源：

2006 INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2 | 2006年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Off-state degradation in drain extended NMOS transistors is studied. It is shown that the damage is primarily due to SiO bonds broken by hot carriers. These hot carriers are generated through impact ionization of surface band-to-band tunneling (BTBT) current. The resultant degradation is found to be universal, enabling reliability projections at lower stress voltages and based on shorter duration tests, than previously anticipated.

引用

页码：479 / +

页数：2

共 16 条

[1] A unified model for the self-limiting hot-carrier degradation in LDD n-MOSFET's
Ang, DS
Ling, CH
[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1998, 45 (01) : 149 - 159
[2] Monte Carlo simulation of the CHISEL flash memory cell
Bude, JD
Pinto, MR
Smith, RK
[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2000, 47 (10) : 1873 - 1881
[3] CHEN Z, 1999, IEDM, P85
[4] Extraction of metal-oxide-semiconductor field-effect-transistor interface state and trapped charge spatial distributions using a physics-based algorithm
Chim, WK
Leang, SE
Chan, DSH
[J]. JOURNAL OF APPLIED PHYSICS, 1997, 81 (04) : 1992 - 2001
[5] FURUKAWA T, 1997, IRPS, P169
[6] HESS K, 2000, IEDM, P91
[7] Kaczer B, 2002, INTERNATIONAL ELECTRON DEVICES 2002 MEETING, TECHNICAL DIGEST, P171, DOI 10.1109/IEDM.2002.1175806
[8] A geometrical unification of the theories of NBTI and HCI time-exponents and its implications for ultra-scaled planar and surround-gate MOSFETs
Kufluoglu, H
Alam, MA
[J]. IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2004, TECHNICAL DIGEST, 2004, : 113 - 116
[9] MAHAPATRA S, 2006, TED, V53, P1583
[10] High-voltage drain extended MOS transistors for 0.18-μm logic CMOS process
Mitros, JC
Tsai, CY
Shichijo, H
Kunz, K
Morton, A
Goodpaster, D
Mosher, D
Efland, TR
[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2001, 48 (08) : 1751 - 1755

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