CMOS Preamplifier for High Performance Computing

被引：0

作者：

Qin Feiyan ^{[1
]}

Li Lei ^{[1
]}

An Qi ^{[1
]}

Wang Yunfeng ^{[1
]}

机构：

[1] Chinese Acad Sci Chinese Univ Hong Kong, Shenzhen Inst Adv Integrat Technol, Shenzhen, Peoples R China

来源：

PROCEEDINGS OF 2009 INTERNATIONAL WORKSHOP ON INFORMATION SECURITY AND APPLICATION | 2009年

关键词：

high performance computing; preamplifier; 0.18 mu m CMOS technology; TRANSIMPEDANCE AMPLIFIER;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

A preamplifier was realized in SMIC 0.18 mu m CMOS technology for the applications of high performance computing. The preamplifier employs the regulated cascade (RGC) configuration as the input stage. Cadence Virtuoso simulations demonstrate the transimpedance gain of 55.75dBohms and -3dB bandwidth of 3.77GHz for 0.62pF photodiode capacitance from a single 1.8V supply. And when the input current amplitude is 30 mu App, the output voltage is achieved to be 18.50mV. The simulation results demonstrate the preamplifier with DC consumption of 29.66mW could work in 5Gbps high performance computing data transmission system.

引用

页码：425 / 428

页数：4

共 4 条

[1] LEE JS, 2002, P IEEE INT SOL STAT, V1, P80
[2] Park S.M., 2000, PROC EUR SOLID STATE, P432
[3] 1.25-Gb/s regulated cascode CMOS transimpedance amplifier for Gigabit Ethernet applications
Park, SM
Yoo, HJ
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39 (01) : 112 - 121
[4] 1-Gb/s 80-dBΩ fully differential CMOS transimpedance amplifier in multichip on oxide technology for optical interconnects
Park, SM
Lee, JS
Yoo, HJ
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39 (06) : 971 - 974

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