Dynamic scheduling of tasks on partially reconfigurable FPGAs

被引:69
作者
Diessel, O [1 ]
ElGindy, H
Middendorf, M
Schmeck, H
Schmidt, B
机构
[1] Univ New S Wales, Sch Comp Sci & Engn, Sydney, NSW 2052, Australia
[2] Univ Karlsruhe, Inst Appl Comp Sci & Formal Descript Methods, D-76128 Karlsruhe, Germany
来源
IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES | 2000年 / 147卷 / 03期
关键词
D O I
10.1049/ip-cdt:20000485
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Field-programmable gate arrays (FPGAs) which allow partial reconfiguration at run time can be shared among multiple independent tasks. When the sequence of tasks to be performed is unpredictable, the FPGA controller needs to make allocation decisions online. Since online allocation suffers from fragmentation, tasks can end up waiting despite there being sufficient, albeit noncontiguous, resources available to service them. The time to complete tasks is consequently longer and the utilisation of the FPGA is lower than it could be. It is proposed that a subset of the tasks executing on the FPGA be rearranged when to do so allows the next pending task to be processed sooner. Methods are described and evaluated for overcoming the NP-hard problems of identifying feasible rearrangements and scheduling the rearrangements when moving tasks are reloaded from off-chip.
引用
收藏
页码:181 / 188
页数:8
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