In-circuit fault tolerance for FPGAs using dynamic reconfiguration and virtual overlays

Reassuring fault tolerance in computing systems is an important problem in high-reliability applications. With the interest in commercial SRAM-based FPGAs in radiation environments, it is beneficial to provide runtime reconfigurable recovery from a failure. In this paper a virtual coarse-grained reconfigurable architecture is proposed, with an embedded on-demand fault-mitigation technique tailored for FPGA overlays. The proposed method performs spatial redundancy and run-time recovery. This approach can achieve up to 3 x faster runtime recovery with 20% less resources in FPGA devices, by providing integrated layers of fault mitigation.