A DC-9.5GHz Noise-Canceling Distributed LNA in 65nm CMOS

被引:0
|
作者
Zhu, Jianxun [1 ]
Krishnaswamy, Harish [1 ]
Kinget, Peter R. [1 ]
机构
[1] Columbia Univ, Dept Elect Engn, New York, NY 10027 USA
来源
2013 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM (RFIC) | 2013年
关键词
CMOS integrated circuits; Distributed amplifier (DA); Low-power; Low noise; Low-noise amplifiers (LNAs); Noise-canceling LNA; Noise cancellation; RF; Wideband LNA; Wideband matching; LOW-POWER; MW;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A low noise amplifier is presented that uniquely achieves wide-band input matching and good low-frequency noise performance at the same time. Its topology is a hybrid of distributed amplifier and a common-source common-gate noise-canceling amplifier. The proof-of-principle prototype in 65nm CMOS operates from DC up to 9.5GHz with more than 12dB gain, achieves a minimum noise figure of 2.8dB, P-1dB of -7dBm, HP3 of +4dBm, consumes 18mW from a 1.4V power supply and occupies a total active area of 0.4mm(2).
引用
收藏
页码:177 / 180
页数:4
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