Design of COR Σ-Δ A/D converters amenable to capacitor scaling in switched-capacitor hardware implementations

被引:0
|
作者
Fraser, NA [1 ]
Nowrouzian, B [1 ]
机构
[1] Univ Alberta, Dept Elect & Comp Engn, Edmonton, AB T6G 2V4, Canada
来源
2002 45TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II, CONFERENCE PROCEEDINGS | 2002年
关键词
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
It is well known that the cascade-of-resonators (COR) Sigma-Delta A/D converters achieve high signal-to-quantization-noise ratio (SQNR) levels in virtue of the fact that the constituent noise transfer function zeros are located at real frequencies. The existing techniques for the design of COR Sigma-Delta A/D converters fail to take into account the capacitance spread and the total capacitance in a corresponding switched-capacitor hardware implementation. This paper presents a novel approach to the design of COR Sigma-Delta A/D converters yielding small capacitance spread as well as small total capacitance. This is achieved by making the constituent feedforward capacitors mirror images of the corresponding feedback capacitors. These conditions are themselves satisfied by ensuring that the signal transfer function is made complementary to the noise transfer function. The application of the proposed approach to the design of a hitherto benchmark COR A/D converter results in a 450% reduction in the capacitance spread, and a 340% reduction in the total capacitance, while yielding the same achievable SQNR and dynamic range.
引用
收藏
页码:355 / 358
页数:4
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