Design of a Closed-Loop, Bidirectional Brain Machine Interface System With Energy Efficient Neural Feature Extraction and PID Control

被引:83
作者
Liu, Xilin [1 ]
Zhang, Milin [2 ]
Richardson, Andrew G. [3 ]
Lucas, Timothy H. [3 ]
Van der Spiegel, Jan [1 ]
机构
[1] Univ Penn, Dept Elect & Syst Engn ESE, Philadelphia, PA 19104 USA
[2] Tsinghua Univ, Dept Elect Engn, Beijing 100084, Peoples R China
[3] Univ Penn, Dept Neurosurg, Philadelphia, PA 19104 USA
基金
美国国家科学基金会;
关键词
Brain machine interface; closed-loop; low-power; neural feature extraction; neural recording; neural stimulation; proportional-integral-derivative (PID); STIMULATION; PERFORMANCE; MOVEMENT; FILTER; GRASP; SOC;
D O I
10.1109/TBCAS.2016.2622738
中图分类号
R318 [生物医学工程];
学科分类号
0831 ;
摘要
This paper presents a bidirectional brain machine interface (BMI) microsystem designed for closed-loop neuroscience research, especially experiments in freely behaving animals. The system-on-chip (SoC) consists of 16-channel neural recording front-ends, neural feature extraction units, 16channel programmable neural stimulator back-ends, in-channel programmable closed-loop controllers, global analog-digital converters (ADC), and peripheral circuits. The proposed neural feature extraction units includes 1) an ultra low-power neural energy extraction unit enabling a 64-step natural logarithmic domain frequency tuning, and 2) a current-mode action potential (AP) detection unit with time-amplitude window discriminator. A programmable proportional-integral-derivative (PID) controller has been integrated in each channel enabling a various of closed-loop operations. The implemented ADCs include a 10-bit voltage-mode successive approximation register (SAR) ADC for the digitization of the neural feature outputs and/or local field potential (LFP) outputs, and an 8-bit current-mode SAR ADC for the digitization of the action potential outputs. The multi-mode stimulator can be programmed to perform monopolar or bipolar, symmetrical or asymmetrical charge balanced stimulation with a maximum current of 4 mA in an arbitrary channel configuration. The chip has been fabricated in 0.18 mu m CMOS technology, occupying a silicon area of 3.7 mm(2). The chip dissipates 56 mu W/ch on average. General purpose low-power microcontroller with Bluetooth module are integrated in the system to provide wireless link and SoC configuration. Methods, circuit techniques and system topology proposed in this work can be used in a wide range of relevant neurophysiology research, especially closed-loop BMI experiments.
引用
收藏
页码:729 / 742
页数:14
相关论文
共 52 条
[1]   PID control system analysis, design, and technology [J].
Ang, KH ;
Chong, G ;
Li, Y .
IEEE TRANSACTIONS ON CONTROL SYSTEMS TECHNOLOGY, 2005, 13 (04) :559-576
[2]  
[Anonymous], P 40 MIDW S CIRC SYS
[3]  
Arsiero M, 2007, ARCH ITAL BIOL, V145, P193
[4]   Restoring sensorimotor function through intracortical interfaces: progress and looming challenges [J].
Bensmaia, Sliman J. ;
Miller, Lee E. .
NATURE REVIEWS NEUROSCIENCE, 2014, 15 (05) :313-325
[5]  
Yeager D., 2014, 2014 Symposium on VLSI Circuits Digest of Technical Papers, DOI [10.1109/JSSC.2014.2384736, 10.1109/VLSIC.2014.6858430]
[6]   Restoring cortical control of functional movement in a human with quadriplegia [J].
Bouton, Chad E. ;
Shaikhouni, Ammar ;
Annetta, Nicholas V. ;
Bockbrader, Marcia A. ;
Friedenberg, David A. ;
Nielson, Dylan M. ;
Sharma, Gaurav ;
Sederberg, Per B. ;
Glenn, Bradley C. ;
Mysiw, W. Jerry ;
Morgan, Austin G. ;
Deogaonkar, Milind ;
Rezai, Ali R. .
NATURE, 2016, 533 (7602) :247-+
[7]   Stimulus-Artifact Elimination in a Multi-Electrode System [J].
Brown, Edgar A. ;
Ross, James D. ;
Blum, Richard A. ;
Nam, Yoonkey ;
Wheeler, Bruce C. ;
DeWeerth, Stephen P. .
IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, 2008, 2 (01) :10-21
[8]   Neuronal oscillations in cortical networks [J].
Buzsáki, G ;
Draguhn, A .
SCIENCE, 2004, 304 (5679) :1926-1929
[9]   A robust high-speed and low-power CMOS current comparator circuit [J].
Chen, L ;
Shi, BX ;
Lu, C .
2000 IEEE ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS: ELECTRONIC COMMUNICATION SYSTEMS, 2000, :174-177
[10]   A Fully Integrated 8-Channel Closed-Loop Neural-Prosthetic CMOS SoC for Real-Time Epileptic Seizure Control [J].
Chen, Wei-Ming ;
Chiueh, Herming ;
Chen, Tsan-Jieh ;
Ho, Chia-Lun ;
Jeng, Chi ;
Ker, Ming-Dou ;
Lin, Chun-Yu ;
Huang, Ya-Chun ;
Chou, Chia-Wei ;
Fan, Tsun-Yuan ;
Cheng, Ming-Seng ;
Hsin, Yue-Loong ;
Liang, Sheng-Fu ;
Wang, Yu-Lin ;
Shaw, Fu-Zen ;
Huang, Yu-Hsing ;
Yang, Chia-Hsiang ;
Wu, Chung-Yu .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2014, 49 (01) :232-247