An effective VHDL-AMS simulation algorithm with event partitioning

VHDL-AMS is a suitable language to describe mixed signal circuits. The nature of analog and digital simulation is different, so they work with two different simulation kernels. Synchronization between these two kernels (the analog solver and the digital kernel) is an important challenge in the mixed signal simulation subject. In this paper we introduce an algorithm for mixed signal simulation that works based on reducing the analog and digital simulation interaction. When the simulator switches to analog simulation, the analog solver initiates the analog parameters, to start analog simulation. Resuming the analog simulation needs some additional steps; in this algorithm we eliminate unnecessary switchings between analog and digital simulation engines. We first explain our simulator, then we describe our new scheduling algorithm. The efficiency of the new synchronization algorithm is shown by examples. Simulation results show that the newly developed algorithm can speed up the simulation in comparison with the canonical algorithm.