A high performance 0.25 mu m logic technology optimized for 1.8V operation

A 0.25 mu m generation logic technology has been developed with high performance transistors and five layers of planarized interconnect. The transistors are optimized for 1.8V operation to provide high performance, low power and good reliability. The interconnects feature extensive use of planarization and high aspect ratio metal lines. 4 Mbit SRAMs with a 10.26 mu m(2) 6-T cell size have been built on this technology.