Reducing memory system energy by software-controlled on-chip memory

被引:0
|
作者
Kondo, M
Nakamura, H
机构
[1] Univ Tokyo, Adv Sci & Technol Res Ctr, Tokyo 1538904, Japan
[2] Japan Sci & Technol Corp, CREST, Kawaguchi 3320012, Japan
来源
IEICE TRANSACTIONS ON ELECTRONICS | 2003年 / E86C卷 / 04期
关键词
processor architecture; cache; on-chip memory; way activation; memory traffic;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In recent computer systems, a large portion of energy is consumed by on-chip cache accesses and data movement between cache and off-chip main memory. Reducing these memory system energy is indispensable for future microprocessors because power and thermal issues certainly become a key factor of limiting processor performance. In this paper, we discuss and evaluate how our architecture called SCIMA contributes to energy saving. SCIMA integrates software-controllable memory (SCM) into processor chip. SCIMA can save total memory system energy by using SCM under the support of compiler. The evaluation results reveal that SCIMA can reduce 5-50% of memory system energy and still faster than conventional cache based architecture.
引用
收藏
页码:580 / 588
页数:9
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