On-chip voltage down converter for low-power digital system

被引：17

作者：

Jou, SJ ^{[1
]}

Chen, TS

机构：

[1] Natl Cent Univ, Dept Elect Engn, Chungli 32054, Taiwan

[2] Chung Hua Telecommun Inst, Taipei Satellite Telecommun Ctr, Taipei, Taiwan

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING | 1998年 / 45卷 / 05期

关键词：

DC-to-DC; low-power digital system; voltage down converter;

D O I：

10.1109/82.673644

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An on-chip differential-amplifier-based de-to-de voltage down converter (VDC) is proposed, The converter is a negative feedback-type voltage follower with precise internal reference voltage generator and high current drive capability. VDC converts 5 V to lower voltage so that the internal circuits of the chip are used. In this paper, 3 V is used as a test vehicle. The proposed VDC has characteristics such as output voltage remains 3 V over a large load current range (0-100 mA) and temperature dependency of 3.2 mV/degrees C, The VDC chip was fabricated in a 0.8-mu m single-poly-double-metal CMOS process and layout size is 690*210 mu m(2), The output voltage is stabilized within +/- 2.8% for supply voltage with +/- 10% variation achieved.

引用

页码：617 / 625

页数：9

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